Chris Diorio
Department of Computer Science and Engineering
University of Washington
114 Sieg Hall, Box 352350
Seattle, WA 98195-2350
(206) 543-7165

Professional Experience

Associate Professor, Computer Science and Engineering, The University of Washington, 2001--present

Assistant Professor, Computer Science and Engineering , The University of Washington, 1997–2001
My research goal is to study the fundamental difference between how digital computers and animal brains “compute”. Toward this goal, I have primary two research thrusts, one in machine learning and one in experimental biology. On the machine-learning side, my students and I are building silicon chips that use the physics of the silicon itself to implement machine learning and/or biologically inspired learning naturally. On the experimental biology side, my colleagues and I are implanting standalone microcomputers into or onto animals (in this case into a marine mollusc and onto a giant moth), to study the neural substrates of animal behavior and control. My educational goals follow the same path as my research: I teach courses in digital electronics and integrated-circuit design, and in alternative computing paradigms including neural, quantum, and DNA computation.

Doctoral Candidate, Physics of Computation Laboratory, California Institute of Technology, 1992–1997
I completed my doctoral research in electrical engineering, working with Professor Carver Mead. I developed a family of single-transistor floating-gate devices useful for analog-circuit design, for silicon neural networks, and for modeling neurobiology; I called these devices silicon synapses. I demonstrated a local learning rule, that can include weight normalization, in arrays of these synapses. I built a nonvolatile, high-resolution analog memory cell, and fabricated self-stabilizing analog circuits with time constants that can be adjusted over a 10-decade range.

Senior Staff Engineer, TRW, Inc., 1991–1997
I developed high-speed circuits and systems using GaAs HBT and InAs HEMT devices. I designed two ultra-low–phase-noise 5.5GHz PLL ICs that consumed 1W and 500mW, respectively. I also set up a collaboration, between TRW and Caltech, to investigate quantum effects in two-dimensional electron-gas GaAs, InAs, and InSb devices at milliKelvin temperatures and in high magnetic fields.

Senior Staff Scientist, American Systems Corporation, 1989–1991
I was the senior division engineer, responsible for all hardware developed by a 12-engineer design team. I introduced several products, including a PC-based data-acquisition system (100MHz preamp, 200MSPS A/D, 32Mbyte memory on an ISA card); a 100MHz bandwidth, 11×11 video crosspoint switch; and a 0.5–18GHz, 16-emitter radar-signal generator for measuring aircraft EW susceptibility.

Technical Consultant, American Systems Corporation, 1988–1989
Prior to my full-time employment with this company, I consulted on the design of a 2GBPS data-acquisition system with a 2×1GHz digital input, a 10-bit, 200MSPS sampled analog input, and a 16Gbyte memory.

Customer Technical Representative, The Analytic Sciences Corporation, 1986–1989
I provided technical support in the development of analog and digital signal-processing hardware for spacecraft. I analyzed and defined system requirements and specifications, and resolved hardware performance issues.

Member of the Technical Staff, TRW, Inc., 1984–1986
I led the team development of a spacecraft data-acquisition and packing unit, for which we designed three 500MHz digital bipolar ICs, two high-speed A/Ds, two CMOS ICs, two ECL gate arrays, and a stackable mechanical architecture. I also designed a 10MSPS, 8-bit A/D converter IC, and a 1GBPS QPSK modulator–driver hybrid.


Ph.D. The California Institute of Technology, Electrical Engineering, 1997
M.S. The California Institute of Technology, Electrical Engineering, 1984
B.A. Occidental College, Physics, 1983

Professional Awards

Awarded the University of Washington Distinguished Teaching Award on June 7, 2001 (also here).

Outstanding Educator nominee at the 2001 College of Engineering Recognition Awards Program on May 7, 2001.

Awarded an ONR Young Investigator Program Award on February 6, 2001.

Awarded an Alfred P. Sloan Foundation Research Fellowship on February 4, 2000.

Distinguished Lecture Series invitee, the University of Virginia, Department of Computer Science, Jan. 24, 2000. Talk title: “Biologically Inspired Computation”.

Awarded an NSF Presidential Early Career Award in Science and Engineering (PECASE) on February 10, 1999 (also here).

Awarded a five-year Packard Foundation Fellowship in science and engineering from the David and Lucile Packard Foundation on October 13, 1998.

Awarded an NSF CAREER Award on May 15, 1998.

Awarded the Electron Devices Society’s Paul Rappaport Award for the best paper in an IEEE EDS publication during 1996, for "A single-transistor silicon synapse," IEEE Trans. Electron Devices, vol. 43, no. 11, pp. 1972–1980, 1996.

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