There are three parts to this problem:
First, a problem details must be decided upon:
Format of a virtual address: --------------------------------------
(offset at lower order end) | segNo | pageNo | offset |
--------------------------------------
This enables us to decompose a virtual address with:
offset = vaddr % pageSize;
vaddr /= pageSize; /* Discard offset and shift */
segNo = vaddr / segSize;
pageNo = vaddr % segSize;
Alternatively, you could attempt to optimize away the divides and mods
using bit manipulations instead, such as:
/* Assumes: segNo is 4 bits, pageNo is 10 bits, */
/* offset is 18 bits */
/* and sizeof(unsigned int)==sizeof(void *)==32 bits */
/* Must convert vaddr from void* to unsigned int first */
offset = vaddr & 0x0003FFFF;
vaddr = (vaddr & 0xFFFC0000) >> 18;
pageNo = vaddr & 0x000003FF;
segNo = (vaddr & 00000C00) >> 10;
But this type of optimization should be done in assembly language.
Next, the formats of both the segment table and the page table must
be specified. A minimal structure that does not allow for error
checking would be simple arrays of pointers:
/* Allows Code, Static, Heap and Stack pages tables */
const int SegTableSize = 4;
void * segTable[SegTableSize]; /* ptrs to the page tables */
The page tables could then be dynamically allocated with:
int PageTableLength = 100; /* or something similar */
int i;
for ( i=0 ; i
2. Page Table Depth
Since each page table entry is 4 bytes and each page contains 4 K
bytes, then a one-page page table would point to 1024 = 2^10 pages,
addressing a total of 2^10 * 2^12 = 2^22 bytes. The address space
however is 2^64 bytes. Adding a second layer of page tables, the
top page table would point to 2^10 page tables, addressing a total
of 2^32 bytes. Continuing this process,
Depth Address Space
===== =============
1 2^22 bytes
2 2^32 bytes
3 2^42 bytes
4 2^52 bytes
5 2^62 bytes
6 2^72 bytes ( >= 2^64 bytes )
we can see that 5 levels do not address the full 64 bit address
space, so a 6th level is required. But only 2 bits of the 6th level
are required, not the entire 10 bits. So instead of requiring your
virtual addresses be 72 bits long, you could mask out and ignore all
but the 2 lowest order bits of the 6th level. This would give you
a 64 bit address. Your top level page table then would have only 4
entries. Yet another option is to revise the criteria that the
top level page table fit into a single physical page and instead make
it fit into 4 pages. This would save a physical page, but is that
much?
How many physical pages are required to hold the entire page table,
if the top 6th level is only 1 page and contains only 4 entries?
Depth Physical 4Kb Pages Required
===== ===========================
1 1
2 (1*2^10)+1 > 2^10
3 ((1*2^10)+1)*2^10+1 > 2^20
4 at least 2^30
5 at least 2^40
6 at least 2^40
and the required size of memory would be:
(2^40 pages) * (4 Kb / page) = 2^42 Kb = 2^32 Mb
Thats a lot of simms!