Mark U Wyse

email: wysem at cs dot washington dot edu



Research Interests

My research interests are in the field of computer architecture and revolve around (a) general purpose parallel computing (e.g., GPGPU-styled architectures), (b) open-source hardware design, and (c) hardware specialization. In the context of GPGPU architecutre, I am interested in the problem of memory divergence, or more generally efficient gather and scatter operations in parallel computing architectures. I am also interested in evaluating and re-architecting data parallel compute architectures in the context of scientific applications and the use of specialized accelerators within heterogeneous architectures and systems. In the scope of open-source hardware design, I am working on the design of a fully open-source, in-order RISC-V processor implementation. Accelerating the adoption of open-source hardware requires not only an open ISA, but also open-source implementations that can be easily taken from RTL to tapeout.

Aside from technical research, I also have interests related to computer engineering education and curricula. As the underlying technology of computing systems changes, how should that change the curriculum we provide and teach?

My past research has spanned a variety of topics, including data processing for novel DNA sequencing technology, modeling approximate computing techniques (see REACT), and the evaluation and comparison of a neural network accelerator on reconfigurable hardware using high level synthesis (see SNNAP).


Conference Papers

Lost in Abstraction: Pitfalls of Analyzing GPUs at the Intermediate Language Level
HPCA 2018
Anthony Gutierrez, Bradfrod Beckmann, Alexandru Dutu, Joseph Gross, John Kalamatianos, Onur Kayiran, Michael Lebeane, Matthew Poremba, Brandon Potter, Sooraj Puthoor, Mark Wyse, Jieming Yin, Akshay Jain, Tim Rogers, Xianwei Zhang, and Matthew Sinclair
Paper (PDF)

Compilation and Hardware Support for Approximate Acceleration
Thierry Moreau, Adrian Sampson, Andre Baixo, Mark Wyse, Ben Ransford, Jacob Nelson, Luis Ceze, and Mark Oskin
Paper (PDF), Slides (PDF)

SNNAP: Approximate Computing on Programmable SoCs via Neural Acceleration
HPCA 2015
Thierry Moreau, Mark Wyse, Jacob Nelson, Adrian Sampson, Hadi Esmaeilzadeh, Luis Ceze, and Mark Oskin
Paper (PDF), Slides (PDF)

Journal and Magazine Articles

A Taxonomy of Approximate Computing Techniques
IEEE Embedded Systems Letters, October 2017
Thierry Moreau, Joshua San Miguel, Mark Wyse, James Bornholt, Armin Alaghi, Luis Ceze, Natalie Enright Jerger, and Adrian Sampson
Paper (PDF)

Workshop Papers

REACT: A Framework for Rapid Exploration of Approximate Computing Techniques
WAX 2015 (colocated with PLDI 2015)
Mark Wyse, Andre Baixo, Thierry Moreau, Bill Zorn, James Bornholt, Adrian Sampson, Luis Ceze, and Mark Oskin
Paper (PDF), Slides (PDF)

Research Reports & Theses

Understanding GPGPU Vector Register File Usage
Ph.D. Qualifying Evaluation Research Report
Mark Wyse
Paper (PDF), Slides (PDF)

Modeling Approximate Computing Techniques
MS Research Report
Mark Wyse
Paper (PDF)

A Taxonomy of Approximate Computing Techniques
UW CSE Technical Report
Thiery Moreau, Joshua San Miguel, Mark Wyse, James Bornholt, Luis Ceze, Natalie Enright Jerger, and Adrian Sampson
Paper (PDF)


CSE 351: The Hardware/Software Interface

CSE 352: Hardware Design and Implementation

CSE 467: Advanced Digital Design

CSE 471: Computer Design and Organization

CSEP 548: Computer Architecture


Next time you see me, ask me about the following: cooking, soccer (Go Sounders!), Seattle, or dual-wielding gyros (the delicious sandwiches). Also, this or this.